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512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Electrical Specifications – AC Operating Conditions
10. AC characteristics assume t T = 1ns. For command and address input slew rates <0.5V/ns,
timing must be derated. Input setup times require an additional 50ps for each 100
mV/ns reduction in slew rate. Input hold times remain unchanged. If the slew rate ex-
ceeds 4.5V/ns, functionality is uncertain.
11. For auto precharge mode, the precharge timing budget ( t RP) begins at t RP – (1 × t CKns),
after the first clock delay and after the last WRITE is executed.
12. CLK must be toggled a minimum of two times during this period.
13. Required clocks are specified by JEDEC functionality and are not dependent on any tim-
ing parameter.
14. Timing is specified by t CKS. Clock(s) specified as a reference only at minimum cycle rate.
15. Timing is specified by t WR plus t RP. Clock(s) specified as a reference only at minimum cy-
cle rate.
16. Timing is specified by t WR.
17. Based on t CK (MIN), CL = 3.
18. For the automotive temperature parts, t REF = t REF/2.
PDF: 09005aef8459c827
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
22
Micron Technology, Inc. reserves the right to change products or specifications without notice.
? 2011 Micron Technology, Inc. All rights reserved.
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